Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory device and operating method of the memory device including detecting erase cell disturbance during programming

Memory device and operating method of the memory device including detecting erase cell disturbance during programming

US Patent 12148485 · Granted Nov 19, 2024

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatus and method for programming data into non-volatile memory device2025
Page buffer circuit and operation method thereof2025
Apparatus and method for reducing signal interference in a semiconductor device2025
Memory device for effectively checking program state and operation method thereo2025
Page buffer comprising a bit line controller and latch units2024
Semiconductor memory device and method of operating the semiconductor memory dev2024
Memory device having wafer-to-wafer bonding structure2023
Memory device having page buffer2023
Memory device and method of applying operating voltage2023
Memory device for counting fail bits included in sensed data2023
Memory device having a control logic to control program operations and method of2022
Memory device for controlling voltage of bit line and method of operating the sa2022