Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for low power chip-to-chip communications with constrained ISI ratio

Method and apparatus for low power chip-to-chip communications with constrained ISI ratio

US Patent 12136996 · Granted Nov 5, 2024

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-wire permuted forward error correction2025
Multi-wire permuted forward error correction2025
Methods of treating chronic lymphocytic leukemia and small lymphocytic leukemia 2025
Methods and systems for high bandwidth communications interface2025
Methods and systems for high bandwidth communications interface2025
Methods and systems for high bandwidth communications interface2025
Horizontal centering of sampling point using multiple vertical voltage2024
Low power chip-to-chip bidirectional communications2024
Vector signaling code with improved noise margin2024
Clock data recovery with decision feedback equalization2024
Interleaved forward error correction over multiple transport channels2024
Interleaved forward error correction over multiple transport channels2024