Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Native support for execution of get exponent, get mantisssa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logic

Native support for execution of get exponent, get mantisssa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logic

US Patent 12067394 · Granted Aug 20, 2024

Estimated economic value: $20,163,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Native support for execution of get exponent, get mantisssa, and scale instructi2025
Native support for execution of get exponent, get mantisssa, and scale instructi2025
Native support for execution of get exponent, get mantisssa, and scale instructi2025
Immediate offset of load store and atomic instructions2025
Sharing register file usage between fused processing resources2025
Systolic array having support for output sparsity2025
Apparatus and method for vector packed signed/unsigned shift, round, and saturat2025
BFLOAT16 scale and/or reduce instructions2025
Register file for systolic array2025
High performance constant cache and constant access mechanisms2025
High performance constant cache and constant access mechanisms2025
Supporting 8-bit floating point format operands in a computing architecture2025