Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Algebraic and deterministic memory authentication and correction with coupled cacheline metadata

Algebraic and deterministic memory authentication and correction with coupled cacheline metadata

US Patent 11995006 · Granted May 28, 2024

Estimated economic value: $30,739,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Zero-redundancy tag storage for bucketed allocators2025
Apparatus, computer-readable medium, and method for reducing bounds checking ove2025
Cryptographic computing with context information for transient side channel secu2025
System, apparatus and method for integrity protecting tenant workloads in a mult2025
System and methods for real time raman spectroscopy for cancer detection2025
Dynamic multilevel memory system2025
Circuitry and methods for implementing micro-context based trust domains2025
Technologies for memory replay prevention using compressive encryption2025
Selective fill for logical control over hardware multilevel memory2025
Distribution of error checking and correction (ECC) bits to allocate ECC bits fo2025
Fast key ID switching via extended paging for cryptographic intra-process isolat2025
Efficient caching and queueing for per-allocation non-redundant metadata2025