Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Dual hydrogen barrier layer for memory devices integrated with low density film for logic structures and methods of fabrication

Dual hydrogen barrier layer for memory devices integrated with low density film for logic structures and methods of fabrication

US Patent 11844225 · Granted Dec 12, 2023

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Ferroelectrically modulated spin orbit logic device2025
Memory cell device with thin-film transistor selector and methods for forming th2025
Doped polar layers and semiconductor device incorporating same2025
Asynchronous carry-ripple adder with majority or minority gates2025
Asynchronous carry-ripple adder with majority or minority gates2025
Asynchronous carry-ripple adder with majority or minority gates2025
Subtractively patterned interconnect structures for integrated circuits2025
Differentially programmable magnetic tunnel junction device and system including2025
Perovskite-based magnetoelectric spin-orbit logic devices2025
Perovskite-based magnetoelectric spin-orbit logic devices2025
Ferroelectric tunnel junction devices with a sparse seed layer and methods for f2025
Integrating embedded memory with logic interconnects2025