Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same

Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same

US Patent 11367733 · Granted Jun 21, 2022

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Three-dimensional memory device including a drain contact etch-stop dielectric l2025
Sub-block separation in NAND memory through word line based selectors2025
Sub-block separation in NAND memory through word line based selectors2025
Bonded assembly containing conductive via structures extending through word line2025
Three-dimensional memory device containing etch-stop structures and self-aligned2025
X-direction divided sub-block mode in NAND2025
Three-dimensional memory device and method of making thereof using double pitch 2025
Three-dimensional memory device containing plural metal oxide blocking dielectri2025
Three-dimensional memory device containing plural metal oxide blocking dielectri2025
Three-dimensional memory device containing epitaxial pedestals and top source co2025
Three-dimensional memory device with self-aligned etch stop rings for a source c2024
Three dimensional memory device and method of making thereof by forming channel 2024