Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Managing low-level instructions and core interactions in multi-core processors

Managing low-level instructions and core interactions in multi-core processors

US Patent 11327759 · Granted May 10, 2022

Estimated economic value: $86,646,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

System and method for instruction unwinding in an out-of-order processor2025
Managing commit order for an external instruction relative to queued instruction2025
Managing commit order for an external instruction relative to queued instruction2025
Managing commit order for an external instruction relative to queued instruction2025
Pair merge execution units for microinstructions2025
System and method for mining digital currency in a blockchain network2025
Processor data cache with shared mid-level cache and low-level cache2025
Processor data cache with shared mid-level cache and low-level cache2025
Dynamic designation of instructions as sensitive for constraining instruction ex2025
Managing power in an integrated circuit for high-speed activation2024
System and method for bitcoin mining with reduced power2024
Low latency inter-chip communication mechanism in a multi-chip processing system2024