Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › MOSFET and memory cell having improved drain current through back bias application

MOSFET and memory cell having improved drain current through back bias application

US Patent 11201215 · Granted Dec 14, 2021

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

3D semiconductor device and structure with logic circuits, memory cells, and pro2025
Electromagnetic wave medical imaging system, device, and methods2025
Automation methods for 3D integrated circuits and devices2025
3D semiconductor devices and structures with slits2025
3D semiconductor device and structure with three levels and isolation layers2025
3D semiconductor memory devices and structures2025
3D semiconductor device and structure with metal layers and memory cells2025
3D semiconductor device and structure2025
Method for producing 3D semiconductor devices and structures with transistors an2025
Memory cell and memory array select transistor2025
Method to produce a 3D multilayer semiconductor device and structure2025
Method to produce a 3D multilayer semiconductor device and structure2025