Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus and methods for low power clock generation in multi-channel high speed devices

Apparatus and methods for low power clock generation in multi-channel high speed devices

US Patent 11196534 · Granted Dec 7, 2021

Estimated economic value: $26,179,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multiphase clock generator2025
Reducing non-linearities of a phase rotator2025
Digitally enhanced digital-to-analog converter resolution2025
Method and system for boosting the speed of a ring-based frequency divider2025
Low latency data handoff using phase rotation and clock gapping2025
Apparatus and method for wideband multi-phase clock generation2025
Broadband active coupling method and device2025
Method and apparatus for clock and data alignment that reduces power consumption2024
Successive approximation register based time-to-digital converter using a time d2024
Reducing non-linearities of a phase rotator2024
Apparatus and method for Sigma-Delta modulator quantization noise cancellation2024
Built-in jitter loading and state of polarization generation to characterize opt2023