Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Optimizing power usage by factoring processor architectural events to PMU

Optimizing power usage by factoring processor architectural events to PMU

US Patent 11144108 · Granted Oct 12, 2021

Estimated economic value: $32,982,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Configuration of base clock frequency of processor based on usage parameters2025
Selection of victim entry in a data structure2025
Current control for a multicore processor2025
Technologies for configuration of memory ranges2025
High performance interconnect2025
High performance interconnect2025
Flexible on-die fabric interface2024
Autonomous platform guidance systems with unknown environment mapping2024
Hierarchical power management apparatus and method2024
Configuration of base clock frequency of processor based on usage parameters2024
Power management based on real time platform power sensing2024
Link affinitization to reduce transfer latency2024