Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Write level optimization for non-volatile memory

Write level optimization for non-volatile memory

US Patent 10990295 · Granted Apr 27, 2021

Estimated economic value: $14,346,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Preprocessing for correcting insertions and deletions in DNA data storage2025
Preprocessing for correcting insertions and deletions in DNA data storage2025
Preprocessing for correcting insertions and deletions in DNA data storage2025
Channel circuit with asynchronous sampling from an oversampled analog-to-digital2025
Channel circuit with asynchronous sampling from an oversampled analog-to-digital2025
Nested error correction codes for DNA data storage2025
Nested error correction codes for DNA data storage2025
Nested error correction codes for DNA data storage2025
Channel circuit with zero force equalizer2025
Channel circuit with zero force equalizer2025
Channel circuit with zero force equalizer2025
Global variance parameter based on mutual information in a data channel2025