{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Systems and methods for reduction of in-phase and quadrature-phase (IQ) clock skew", "item": "https://www.patentleaderboard.com/patent/10972108"}]}
Skip to contentUS Patent 10972108 · Granted Apr 6, 2021