Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Dual purpose on-chip buffer memory for low latency switching

Dual purpose on-chip buffer memory for low latency switching

US Patent 10958575 · Granted Mar 23, 2021

Estimated economic value: $2,115,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Deep application discovery and forensics for automated threat modeling2024
Fine-grained SD-WAN optimization services for cloud-native applications2023
Host based non-volatile memory clustering mechanism using network mapped storage2022
Host based non-volatile memory clustering mechanism using network mapped storage2022
Switch monitoring statistics gathering at servers and gateways for overlay netwo2021
Switch monitoring statistics gathering at servers and gateways for overlay netwo2021
Data replication for a virtual networking system2021
Segmentation and reassembly of network packets for switched fabric networks2021
Segmentation and reassembly of network packets for switched fabric networks2021
Arbitration of multiple-thousands of flows for convergence enhanced ethernet2020
Overlay network movement operations2020
Overlay network movement operations2020