Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › PCIE lane aggregation over a high speed link

PCIE lane aggregation over a high speed link

US Patent 10929325 · Granted Feb 23, 2021

Estimated economic value: $93,135,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-protocol IO infrastructure for a flexible storage platform2025
Using neural networks to perform fault detection in autonomous driving applicati2025
Near-memory compute module2025
Single-cycle byte correcting and multi-byte detecting error code2024
Multi-protocol IO infrastructure for a flexible storage platform2024
Techniques for recovering from errors when executing software applications on pa2024
Techniques for storing data to enhance recovery and detection of data corruption2023
Parity check decoding2023
Near-memory compute module2023
Error containment for enabling local checkpoint and recovery2023
Liveness as a factor to evaluate memory vulnerability to soft errors2023
Using neural networks to perform fault detection in autonomous driving applicati2023