Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › High performance method for reduction of memory power consumption employing RAM retention mode control with low latency and maximum granularity

High performance method for reduction of memory power consumption employing RAM retention mode control with low latency and maximum granularity

US Patent 10825486 · Granted Nov 3, 2020

Estimated economic value: $9,173,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Power supply peak current measurement2024
Systems and methods for pulse width modulation shaping2023
High frequency pulse width modulation shaping2023
Embedded information system and method for memory management2022
Systems and methods for managing cache replacement2022
Hardware for supporting OS driven observation and anticipation based on more gra2022
Hardware for supporting OS driven observation and anticipation based on more gra2022
Hardware for supporting time triggered load anticipation in the context of a rea2022
Hardware for supporting time triggered load anticipation in the context of a rea2022
Capacitive touch sensing with high safety integrity2022
Systems and methods for managing variable size load units2021
Hardware support for OS-centric performance monitoring with data collection2021