Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › SRAM write yield enhancement with pull-up strength modulation

SRAM write yield enhancement with pull-up strength modulation

US Patent 10811086 · Granted Oct 20, 2020

Estimated economic value: $33,725,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

On chip test architecture for continuous time delta sigma analog-to-digital conv2025
Semiconductor device including a level shifter and method of mitigating a delay 2025
Memory with scan chain testing of column redundancy logic and multiplexing2025
Memory with scan chain testing of column redundancy logic and multiplexing2025
Low overhead mesochronous digital interface2025
High-speed multi-port memory supporting collision2024
High-speed multi-port memory supporting collision2024
High-speed multi-port memory supporting collision2024
Semiconductor device including a level shifter and method of mitigating a delay 2024
Semiconductor device including a level shifter and method of mitigating a delay 2024
Semiconductor device including a level shifter and method of mitigating a delay 2024
Power supply circuit with reduced leakage current2024