Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multiple plate line architecture for multideck memory array

Multiple plate line architecture for multideck memory array

US Patent 10734057 · Granted Aug 4, 2020

Estimated economic value: $16,764,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Counter-based sense amplifier method for memory cells2025
Counter-based methods and systems for accessing memory cells2025
Memory array seasoning2025
Threshold compensated detector for memory sense2025
Transistor configurations for vertical memory arrays2025
Parallel access in a memory array2025
Cascoded sense amplifiers for self-selecting memory2025
Performing sense operations in memory2025
Shared decoder architecture for three-dimensional memory arrays2025
Single plate configuration and memory array operation2025
Refresh determination using memory cell patterns2025
Read operations based on a dynamic reference2024