Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Non-volatile static random access memory architecture having single non-volatile bit per volatile memory bit

Non-volatile static random access memory architecture having single non-volatile bit per volatile memory bit

US Patent 10706928 · Granted Jul 7, 2020

Estimated economic value: $15,384,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Device of the EEPROM memory type with an architecture of the split voltage type2025
Aging proof delay circuit2025
Latch device, in particular for row decoding and column decoding of an EEPROM me2025
I2C buffer circuit with fall time control2025
I2C buffer circuit with fall time control2025
Protection of an integrated circuit against electrostatic discharges2025
Low-dispersion component in an electronic chip2024
Compact EEPROM memory cell with a gate dielectric layer having two different thi2024
Communication on an I2C bus2024
Test circuit2023
Non volatile static random access memory device and corresponding control method2023
Non volatile static random access memory device and corresponding control method2023