Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Training and tracking of DDR memory interface strobe timing

Training and tracking of DDR memory interface strobe timing

US Patent 10659215 · Granted May 19, 2020

Estimated economic value: $14,719,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Key management system2025
Hot storage backup system and method for server2025
Clocking architecture for communicating synchronous and asynchronous clock signa2025
Chip bump interface compatible with different orientations and types of devices2025
Clocking architecture for communicating clock signals having different frequenci2024
Chip bump interface compatible with different orientations and types of devices2023
Calibrated linear duty cycle correction2023
Strobe tree circuit for capturing data using a memory-sourced strobe2022
Calibration of transmitter output impedance and receiver termination impedance u2021
Global clock and a leaf clock divider2020
Testing an integrated circuit receiver in a package using a varying analog volta2020
Systems providing interposer structures2020