Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for supporting the use of interleaved memory regions

Method and apparatus for supporting the use of interleaved memory regions

US Patent 10540277 · Granted Jan 21, 2020

Estimated economic value: $19,068,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

One-time programmable (OTP) memory controller with a control circuit configured 2025
Register shielding in semiconductor devices2025
System on a chip and a power down process for IP access resilience2024
Artificial reality system having multi-bank, multi-port distributed shared memor2024
Dynamic memory management in mixed mode cache and shared memory systems2023
Method of resetting a master device of a system on chip and corresponding system2023
Cryptography method and circuit, corresponding device2022
Artificial reality system having multi-bank, multi-port distributed shared memor2022
Processing system, related integrated circuit and method2022
Decryption method and circuit, corresponding device2021
Binary-to-gray conversion circuit, related FIFO memory, integrated circuit and m2020
Method and apparatus for use with different memory maps2019