Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Ultra-low-power design memory power reduction scheme

Ultra-low-power design memory power reduction scheme

US Patent 10539997 · Granted Jan 21, 2020

Estimated economic value: $24,171,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integrated power management cells for gate all around technologies2025
Systems and methods for adaptive power multiplexing2025
Configurable MAC for neural network applications2023
Systems and methods for adaptive power multiplexing with a first type of power m2023
Method and apparatus for symmetric aging of clock trees2023
Systems and methods providing leakage reduction for power gated domains2022
Pre-allocated random access identifiers2021
Pre-allocated random access identifiers2020
Dynamic memory protection2020
Smart battery wear leveling for audio devices2020
Audio systems and methods2020
Digital design with bundled data asynchronous logic and body-biasing tuning2020