Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for preventing inherent error propagation of successive approximation register analog-to-digital converter through digital correction

Method and apparatus for preventing inherent error propagation of successive approximation register analog-to-digital converter through digital correction

US Patent 10425094 · Granted Sep 24, 2019

Estimated economic value: $28,939,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method of ethernet auto-negotiation over one cable2022
Spread-spectrum modulated clock signal2022
Multi-mode ethernet transceiver2019
Probabilistic digital delay measurement device2017
Multi-port ethernet transceiver2011
Viterbi decoder2008
Method for storing path metrics in a viterbi decoder2006
ACS unit for a viterbi decoder2004