Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Distributed contiguous reads in a network on a chip architecture

Distributed contiguous reads in a network on a chip architecture

US Patent 10346049 · Granted Jul 9, 2019

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Asynchronous data transmission over avionics communication network2025
DMA engine for transferring data in a network-on-a-chip processor2018
Chained packet sequences in a network on a chip architecture2018
Chained packet sequences in a network on a chip architecture2018
Synchronization in a multi-processor computing system2018
Synchronization in a multi-processor computing system2018
System and method for implementation of cyber security2016
User-friendly, child-resistant container2014
Dynamic self-tuning soft-error-rate-discrimination for enhanced availability of 2009
Method and system for expressing the algorithms for the manipulation of hardware2008
Diagnostic cage for testing redundant system controllers2004
Cage for dynamic attach testing of I/O boards2003