Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Scalable interleaved digital-to-time converter circuit for clock generation

Scalable interleaved digital-to-time converter circuit for clock generation

US Patent 10218379 · Granted Feb 26, 2019

Estimated economic value: $20,644,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dual feedback stacking method for increasing digital power amplifier supply rang2025
Quadrature chirp generation2025
Adaptive frequency scaling based on clock cycle time measurement2025
Integrated circuit margin measurement2025
Apparatus, system and method of communicating a multiple-input-multiple-output (2025
Digital-to-time converter (DTC) non-linearity predistortion2025
Self-interference canceller2025
Communication device, hearing aid system and computer readable medium2025
Dynamic power rail floating for CDAC circuits2025
Multi-core digital power amplifier with unbalanced combiner2025
Integrated circuit profiling and anomaly detection2025
Integrated circuit pad failure detection2025