Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor device with a buried junction layer having an interspersed pattern of doped and counter-doped materials

Semiconductor device with a buried junction layer having an interspersed pattern of doped and counter-doped materials

US Patent 10128330 · Granted Nov 13, 2018

Estimated economic value: $12,069,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor devices and methods of manufacturing semiconductor devices2025
Electronic device including a semiconductor layer within a trench and a semicond2024
Semiconductor devices and methods of manufacturing semiconductor devices2024
Methods of manufacture for trench-gate insulated-gate bipolar transistors (IGBTs2023
Methods of manufacture for trench-gate insulated-gate bipolar transistors (IGBTs2023
Drain-extended transistor2022
Trench-gate insulated-gate bipolar transistors2021
Trench-gate insulated-gate bipolar transistors2021
Trench-gate insulated-gate bipolar transistors (IGBTs)2020
Trench-gate insulated-gate bipolar transistors (IGBTs)2020
Electronic device including an insulated gate bipolar transistor having a field-2020
Electronic device including an insulated gate bipolar transistor having a field-2020