Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Package substrate having a plurality of chips electrically connected by conductive vias and wiring bonding

Package substrate having a plurality of chips electrically connected by conductive vias and wiring bonding

US Patent 10079220 · Granted Sep 18, 2018

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor package antenna structure and its manufacturing method2025
Method of fabricating a flip-chip package core substrate with build-up layers2024
Inductance traces protected through shielding layers2024
Inductor structure having conductive sheets having fan plate shape arranged in r2024
Manufacturing method for surface acoustic wave filter package structure2023
Semiconductor package device2023
Intermediate substrate and fabrication method thereof2023
Intermediate substrate and fabrication method thereof2023
Semiconductor package structure and method of making the same2023
Flip-chip package substrate2022
Flip-chip package substrate2022
Flip-chip packaging substrate and method for fabricating the same2022