Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Visualization of analysis process parameters for layout-based checks

Visualization of analysis process parameters for layout-based checks

US Patent 10055533 · Granted Aug 21, 2018

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dynamic allocation of computing resources for electronic design automation opera2024
Resource provisioning for multiple invocations to an electronic design automatio2022
Hybrid performance of electronic design automation (EDA) procedures with delayed2020
Automatic moving of probe locations for parasitic extraction2020
Resource utilization of heterogeneous compute units in electronic design automat2020
Logic-driven layout verification2020
Resistor network reduction for full-chip simulation of current density2020
Electrostatic damage protection circuitry verification2019
Display screen with graphical user interface2017
Display screen with graphical user interface2017
Determination of electromigration susceptibility based on hydrostatic stress ana2015
Hierarchical feature extraction for electrical interaction calculations2014