Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7152071 | Shape-based geometric database and methods and systems for construction and use thereof | — | 2006-12-19 |
| 7139992 | Short path search using tiles and piecewise linear cost propagation | Russell Kao | 2006-11-21 |
| 6901506 | Maximal tile generation technique and associated methods for designing and manufacturing VLSI circuits | — | 2005-05-31 |
| 6813755 | Active region management techniques and associated methods of designing and manufacturing VLSI circuits | — | 2004-11-02 |
| 6792587 | 2.5-D graph for multi-layer routing | Russell Kao | 2004-09-14 |
| 6763512 | Detailed method for routing connections using tile expansion techniques and associated methods for designing and manufacturing VLSI circuits | — | 2004-07-13 |
| 6665852 | Piecewise linear cost propagation for path searching | Russell Kao | 2003-12-16 |
| 6519756 | Method and apparatus for building an integrated circuit | Russell Kao | 2003-02-11 |
| 6446245 | Method and apparatus for performing power routing in ASIC design | Russell Kao | 2002-09-03 |
| 6389376 | Method and apparatus for generating n-segment steiner trees | William Lam | 2002-05-14 |