Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7030664 | Half-rail differential driver circuit | — | 2006-04-18 |
| 6972605 | High speed semi-dynamic flip-flop circuit | — | 2005-12-06 |
| 6906556 | High-speed domino logic with improved cascode keeper | — | 2005-06-14 |
| 6876230 | Synchronous clocked full-rail differential logic with single-rail logic and shut-off | — | 2005-04-05 |
| 6859072 | Method for clock control of clocked half-rail differential logic with sense amplifier and single-rail logic | — | 2005-02-22 |
| 6828826 | Method for clock control of half-rail differential logic | — | 2004-12-07 |
| 6784697 | Method for clock control of clocked half-rail differential logic with sense amplifier and shut-off | — | 2004-08-31 |
| 6768345 | Method for clock control of clocked full-rail differential logic circuits with sense amplifier and shut-off | Edgardo F. Klass | 2004-07-27 |
| 6768344 | Clocked half-rail differential logic with single-rail logic and sense amplifier | — | 2004-07-27 |
| 6768343 | Clocked half-rail differential logic with sense amplifier and shut-off | — | 2004-07-27 |
| 6765415 | Clocked full-rail differential logic with shut-off | Edgardo F. Klass | 2004-07-20 |
| 6750678 | Method for increasing the load capacity of clocked half-rail differential logic | — | 2004-06-15 |
| 6750679 | Clocked full-rail differential logic with sense amplifier and single-rail logic | — | 2004-06-15 |
| 6744283 | Clocked half-rail differential logic with sense amplifier | — | 2004-06-01 |
| 6741101 | Method for clock control of clocked half-rail differential logic with single-rail logic | — | 2004-05-25 |
| 6737889 | Method for increasing the power efficiency and noise immunity of clocked full-rail differential logic | Edgardo F. Klass | 2004-05-18 |
| 6717438 | Clocked half-rail differential logic with single-rail logic | — | 2004-04-06 |
| 6714059 | High-speed domino logic circuit | — | 2004-03-30 |
| 6703867 | Clocked full-rail differential logic with sense amplifier and shut-off | Edgardo F. Klass | 2004-03-09 |
| 6661257 | Method for clocking charge recycling differential logic | — | 2003-12-09 |
| 6639429 | Method for clock control of half-rail differential logic | — | 2003-10-28 |
| 6630846 | Modified charge recycling differential logic | — | 2003-10-07 |
| 6624664 | Clocked full-rail differential logic with sense amplifiers | Edgardo F. Klass | 2003-09-23 |
| 6617882 | Clocked half-rail differential logic | — | 2003-09-09 |
| 6614264 | Method for increasing the load capacity of full-rail differential logic | Edgardo F. Klass | 2003-09-02 |