Issued Patents All Time
Showing 26–50 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6194929 | Delay locking using multiple control signals | Robert J. Drost, Jose M. Cruz | 2001-02-27 |
| 6148038 | Circuit for detecting and decoding phase encoded digital serial data | Robert J. Drost | 2000-11-14 |
| 6084452 | Clock duty cycle control technique | Robert J. Drost, Jose M. Cruz | 2000-07-04 |
| 6076175 | Controlled phase noise generation method for enhanced testability of clock and data generator and recovery circuits | Robert J. Drost | 2000-06-13 |
| 6055269 | Adaptive equalization technique using twice sampled non-return to zero data | Robert J. Drost, Jose M. Cruz | 2000-04-25 |
| 6031406 | Single rail regulator | Robert J. Drost, Jose M. Cruz | 2000-02-29 |
| 6028903 | Delay lock loop with transition recycling for clock recovery of NRZ run-length encoded serial data signals | Robert J. Drost | 2000-02-22 |
| 6020765 | Frequency difference detector for use with an NRZ signal | Robert J. Drost | 2000-02-01 |
| 6016082 | Low phase noise LC oscillator for microprocessor clock distribution | Jose M. Cruz, Robert J. Drost | 2000-01-18 |
| 5982834 | Clock recovery system for high speed small amplitude data stream | Robert J. Drost | 1999-11-09 |
| 5963606 | Phase error cancellation method and apparatus for high performance data recovery | Robert J. Drost | 1999-10-05 |
| 5955911 | On-chip differential resistance technique with noise immunity and symmetric resistance | Robert J. Drost, Jose M. Cruz | 1999-09-21 |
| 5920215 | Time-to-charge converter circuit | Robert J. Drost | 1999-07-06 |
| 5912567 | Dual differential comparator with weak equalization and narrow metastability region | Robert J. Drost, Jose M. Cruz | 1999-06-15 |
| 5905399 | CMOS integrated circuit regulator for reducing power supply noise | Robert J. Drost | 1999-05-18 |
| 5898297 | Differential high speed driver for low voltage operation | Robert J. Drost | 1999-04-27 |
| 5850163 | Active inductor oscillator with wide frequency range | Robert J. Drost | 1998-12-15 |
| 5789986 | Frequency controlled bias generator for stabilizing clock generation circuits | Robert J. Drost | 1998-08-04 |
| 5783953 | CMOS current controlled delay element using cascoded complementary differential amplifiers with replicated bias clamp | Robert J. Drost | 1998-07-21 |
| 5777567 | System and method for serial to parallel data conversion using delay line | David M. Murata, Robert J. Drost | 1998-07-07 |
| 5767699 | Fully complementary differential output driver for high speed digital communications | Robert J. Drost, David M. Murata | 1998-06-16 |
| 5485106 | ECL to CMOS converter | Robert J. Drost, David M. Murata, Mark R. Santoro, Lee S. Tavrow | 1996-01-16 |
| 5446686 | Method and appartus for detecting multiple address matches in a content addressable memory | Mark R. Santoro | 1995-08-29 |
| 5068551 | Apparatus and method for translating ECL signals to CMOS signals | — | 1991-11-26 |
| 5003509 | Multi-port, bipolar-CMOS memory cell | — | 1991-03-26 |