Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5615357 | System and method for verifying processor performance | — | 1997-03-25 |
| 5493672 | Concurrent simulation of host system at instruction level and input/output system at logic level with two-way communication deadlock resolution | Manpop A. Lau, Raju Joshi | 1996-02-20 |