Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9893878 | On-chip jitter measurement for clock circuits | Long Kong, Ben Li Chen, Philip P. Kwan, Zuxu Qin | 2018-02-13 |
| 9306732 | At-rate SERDES clock data recovery with controllable offset | Jianghui Su, Hongtao Zhang, Deqiang Song | 2016-04-05 |
| 9231752 | Clock data recovery with increased frequency offset tracking | Yan Yan, Ali Gokhan Ileri, Jianghui Su, Xun Zhang, Sifang You | 2016-01-05 |
| 9184906 | Configurable pulse amplitude modulation clock data recovery | JiHong Min, Jianghui Su, Hongtao Zhang | 2015-11-10 |
| 9036757 | Post-cursor locking point adjustment for clock data recovery | Jianghui Su, Francis X. Schumacher, Zuxu Qin | 2015-05-19 |
| 8994427 | Method and apparatus for duty cycle distortion compensation | Zuxu Qin, Deqiang Song, Jianghui Su, Baoqing Huang, Yan Yan | 2015-03-31 |
| 8744024 | Clock-data recovery with non-zero h(−1) target | Deqiang Song, Jianghui Su, Osman Javed, Hongtao Zhang | 2014-06-03 |
| 8634500 | Direct feedback equalization with dynamic referencing | Zuxu Qin, Rajesh Kumar, Jing Shi, Deqiang Song | 2014-01-21 |
| 8599909 | Serial link voltage margin determination in mission mode | Drew G. Doblar, Deqiang Song | 2013-12-03 |
| 8542764 | Power and area efficient SerDes transmitter | Dong J. Yoon, Drew G. Doblar | 2013-09-24 |
| 8452829 | Real-time optimization of TX FIR filter for high-speed data communication | Dong J. Yoon, Osman Javed, Zuxu Qin, Deqiang Song, Daniel J. Beckman +6 more | 2013-05-28 |
| 8446985 | Method and system for reducing duty cycle distortion amplification in forwarded clocks | Drew G. Doblar, Deqiang Song | 2013-05-21 |
| 8249188 | Mechanism for constructing an oversampled waveform for a set of signals received by a receiver | Deqiang Song, Drew G. Doblar, Michael S. Harwood, Nirmal C. Warke | 2012-08-21 |
| 8249199 | Low jitter and high bandwidth clock data recovery | Drew G. Doblar, Gabriel Risk | 2012-08-21 |
| 8243866 | Analog baud rate clock and data recovery | Zuxu Qin, Drew G. Doblar, Waseem Ahmad, Dong J. Yoon, Osman Javed | 2012-08-14 |
| 8229020 | Integrated equalization and CDR adaptation engine with single error monitor circuit | Muthukumar Vairavan, Dong J. Yoon, Drew G. Doblar | 2012-07-24 |
| 8218702 | System and method of adapting precursor tap coefficient | Deqiang Song, Jianghui Su, Drew G. Doblar | 2012-07-10 |
| 8181058 | Clock-data-recovery technique for high-speed links | Jianghui Su, Deqiang Song, Muthukumar Vairavan | 2012-05-15 |
| 8155214 | Asymmetric decision feedback equalization slicing in high speed transceivers | Deqiang Song, Jianghui Su, Drew G. Doblar | 2012-04-10 |
| 8009763 | Method and apparatus for equalizing a high speed serial data link | Gabriel Risk, Drew G. Doblar | 2011-08-30 |
| 8000426 | Mechanism for constructing an oversampled waveform for a set of signals received by a receiver | Deqiang Song, Drew G. Doblar, Michael S. Harwood, Nirmal C. Warke | 2011-08-16 |
| 7880568 | Equalizer system having a tunable active inductor | Arif Amin, Baoqing Huang, Waseem Ahmad, Drew G. Doblar | 2011-02-01 |
| 7844236 | Apparatus and method for enabling an adaptation unit to be shared among a plurality of receivers | Jianghui Su, Quang H. Trang | 2010-11-30 |
| 7839212 | Method and apparatus for a high bandwidth amplifier with wide band peaking | Arif Amin, Waseem Ahmad, Rajesh Kumar, Venkatesh Arunachalam | 2010-11-23 |
| 7437491 | Clock and data recovery wherein an FB-DIMM is connected to signal path and null and sync frames control the FB-DIMM | Gabriel Risk, Jason H. Bau | 2008-10-14 |