Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6175881 | Microcontroller having a memory, a dedicated multitask memory, and switching circuit for selectively connecting the multitask memory to the internal or external bus | — | 2001-01-16 |
| 5339271 | Semiconductor memory circuit | — | 1994-08-16 |
| 5337280 | EEPROM circuit | Kazuhiko Miyazaki | 1994-08-09 |
| 5231637 | Apparatus for testing a PLA by measuring a current consumed by the PLO when activated with known codes | — | 1993-07-27 |
| 5119330 | Nonvolatile memory system for multiple value storing | — | 1992-06-02 |
| 5117380 | Random number generator driven by independent clock pulses asynchronously with system clock pulses | — | 1992-05-26 |
| 5101483 | Instruction decoder simplification by reuse of bits to produce the same control states for different instructions | — | 1992-03-31 |
| 5088027 | Single-chip microcomputer | Tomoaki Yoshida | 1992-02-11 |
| 5068783 | Microcomputer having a built-in PROM for storing an optional program | Tomoaki Yoshida | 1991-11-26 |
| 5062075 | Microcomputer having security memory using test and destruction routines | Tomoaki Yoshida | 1991-10-29 |
| 5059828 | Programmable logic array circuit having a gate to control an output condition state of a latch thereof | — | 1991-10-22 |
| 4969087 | Single-chip microcomputer | Tomoaki Yoshida | 1990-11-06 |
| 4875156 | Computer having a protection device to selectively block incorrect control signals | Tomoaki Yoshida | 1989-10-17 |
| 4866608 | Microprocessor with improved execution of instructions | — | 1989-09-12 |
| 4788454 | Power-on reset circuit | Tomoaki Yoshida | 1988-11-29 |
| 4566111 | Watchdog timer | — | 1986-01-21 |