Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12425039 | Time-interleaved ADC skew correction | Kamlesh Singh | 2025-09-23 |
| 11669116 | Low dropout regulator | Pankaj Agrawal | 2023-06-06 |
| 11520364 | Utilization of voltage-controlled currents in electronic systems | Koteswararao Nannapaneni | 2022-12-06 |
| 11449088 | Bandgap reference voltage generator with feedback circuitry | Mukul Pancholi | 2022-09-20 |
| 11449087 | Start-up circuit for self-biased circuit | — | 2022-09-20 |
| 11211904 | Switched-capacitor amplifier circuit | — | 2021-12-28 |
| 11018682 | Time-interleaved sub-ranging analog-to-digital converter | Pankaj Agrawal, Ashish Panpalia | 2021-05-25 |
| 11018684 | Hybrid pipeline analog-to-digital converter | Pankaj Agrawal, Ashish Panpalia | 2021-05-25 |
| 10826511 | Pipeline analog-to-digital converter | Pankaj Agrawal, Ashish Panpalia | 2020-11-03 |
| 10630304 | Sub-ranging analog-to-digital converter | Ronak Trivedi, Pankaj Agrawal | 2020-04-21 |
| 10615750 | Preamplifier circuit with floating transconductor | Hitesh Kumar Garg | 2020-04-07 |
| 10438677 | Modular sample-and-hold circuit | Hitesh Kumar Garg | 2019-10-08 |
| 8640949 | Method for assembling and activating a multi-pack package of transaction cards | Ted Biskupski, Christina Lee Bachmann, Glenn D. Epis, Darryl Chan | 2014-02-04 |
| 7368976 | Method and apparatus for providing compensation against temperature, process and supply voltage variation | Paras Garg | 2008-05-06 |
| 7164305 | High-voltage tolerant input buffer circuit | Paras Garg | 2007-01-16 |
| 6955444 | Surgical headlight | — | 2005-10-18 |
| 6753714 | Reducing power and area consumption of gated clock enabled flip flops | — | 2004-06-22 |
| 6686773 | Reducing short circuit power in CMOS inverter circuits | Arup Dash | 2004-02-03 |
| 5229005 | Ocean depth reverse osmosis fresh water factory | Yu-Si Fok | 1993-07-20 |