Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11301607 | Testing of asynchronous reset logic | Tom Waayers, Johan C. Meirlevede, Vincent Chalendard, Michael Rodat | 2022-04-12 |
| 9746519 | Circuit for securing scan chain data | — | 2017-08-29 |
| 9170297 | Secure low pin count scan | — | 2015-10-27 |
| 7900108 | Multi-clock system-on-chip with universal clock control modules for transition fault test at speed multi-core | Herv Vincent | 2011-03-01 |