Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9653447 | Local interconnect layer enhanced ESD in a bipolar-CMOS-DMOS | Jan Claes | 2017-05-16 |
| 9153958 | Bias-insensitive trigger circuit for bigFET ESD supply protection | Gijs Jan de Raad, Paul Hendrik Cappon | 2015-10-06 |
| 8654488 | Secondary ESD circuit | Taede Smedes | 2014-02-18 |
| 7265574 | Fail-safe method and circuit | — | 2007-09-04 |