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USPTO Patent Rankings Data through Dec 31, 2025
GS

Gal Shalom — 11 Patents

NVIDIA: 11 patents #657 of 7,811Top 9%
Givat Avni, IL: #1 of 7 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Gal Shalom has been granted 11 US patents while listed as an inventor at NVIDIA. The first was granted in 2024 and the most recent in December 2025. Gal Shalom ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Gal Shalom in Givat Avni, IL.

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
12499082 Disaggregation of processing pipeline Adit Uday Ranadive, Omri Kahalon, Aviad Yehezkel, Liran Liss, Yorai Itzhak Zack +1 more 2025-12-16
12425334 Link aggregation in InfiniBand networks Adi Horowitz, Omri Kahalon, Rabia Loulou, Aviad Yehezkel, Matty Kadosh 2025-09-23
12407569 Hardware supported flow migration Aviad Yehezkel, Ariel Shahar, Omri Kahalon, Yohad Dickman 2025-09-02
12284115 Multipathing with remote direct memory access connections Adi Horowitz, Omri Kahalon, Rabia Loulou, Aviad Yehezkel, Liel Yonatan Maman +1 more 2025-04-22
12277068 Adaptive configuration of address translation cache Daniel Marcovitch, Ran Avraham Koren, Amir Sharaffy, Shay Aisman, Ariel Shahar 2025-04-15
12255828 QOS for multiplex network receive queue Omri Kahalon, Aviad Yehezkel, Yossi Kuperman, Roni Bar Yanai 2025-03-18
12238179 Systems and methods of message-based packets Omri Kahalon, Adi Horowitz, Aviad Yehezkel, Eliav Bar-Ilan 2025-02-25
12231495 Session sharing with remote direct memory access connections Adi Horowitz, Rabia Loulou, Omri Kahalon, Aviad Yehezkel, Asaf Schwartz +1 more 2025-02-18
12147716 Methods and systems for inter-stack communication for logical volume management Omri Kahalon, Aviad Yehezkel, Liran Liss, Oren Duer, Rabie Loulou +1 more 2024-11-19
11902372 Session sharing with remote direct memory access connections Adi Horowitz, Rabia Loulou, Omri Kahalon, Aviad Yehezkel, Asaf Schwartz +1 more 2024-02-13
11861211 System which provides plural processes in a host with asynchronous access to plural portions of the memory of another host Adi Horowitz, Omri Kahalon, Liran Liss, Aviad Yehezkel, Rabie Loulou 2024-01-02