Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9425110 | Yield enhancing vertical redundancy method for 3D wafer level packaged (WLP) integrated circuit systems | Philip W. Hon, Shih-En Shih, Roger Tsai, Xianglin ZENG | 2016-08-23 |
| 6683510 | Ultra-wideband planar coupled spiral balun | — | 2004-01-27 |