Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5766991 | CMOS process utilizing disposable silicon nitride spacers for making lightly doped drain | — | 1998-06-16 |
| 5486480 | Method of fabrication of protected programmable transistor with reduced parasitic capacitances | — | 1996-01-23 |
| 5424567 | Protected programmable transistor with reduced parasitic capacitances and method of fabrication | — | 1995-06-13 |
| 5110757 | Formation of composite monosilicon/polysilicon layer using reduced-temperature two-step silicon deposition | Margareth C. Arst, Kenneth N. Ritz, Shailesh Redkar | 1992-05-05 |
| 5008212 | Selective asperity definition technique suitable for use in fabricating floating-gate transistor | — | 1991-04-16 |
| 4786609 | Method of fabricating field-effect transistor utilizing improved gate sidewall spacers | — | 1988-11-22 |
| 4653173 | Method of manufacturing an insulated gate field effect device | — | 1987-03-31 |
| 4584205 | Method for growing an oxide layer on a silicon surface | Anjan Bhattacharyya, William Stacy, Charles J. Vorst, Albert Schmitz | 1986-04-22 |