Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5418179 | Process of fabricating complementary inverter circuit having multi-level interconnection | — | 1995-05-23 |
| 4870033 | Method of manufacturing a multilayer electrode containing silicide for a semiconductor device | Osamu Hanagasaki | 1989-09-26 |
| 4807011 | Semiconductor integrated circuit incorporating SITS | Terumoto Nonaka | 1989-02-21 |
| 4710265 | Method of producing semiconductor integrated circuit having parasitic channel stopper region | — | 1987-12-01 |
| 4619035 | Method of manufacturing a semiconductor device including Schottky barrier diodes | Shingo Sakakibara | 1986-10-28 |
| 4409725 | Method of making semiconductor integrated circuit | Terumoto Nonaka | 1983-10-18 |
| 4377900 | Method of manufacturing semiconductor device | Terumoto Nonaka | 1983-03-29 |
| 4216038 | Semiconductor device and manufacturing process thereof | Jun-ichi Nishizawa, Yasunori Mochida, Terumoto Nonaka, Shin Yamashita | 1980-08-05 |
| 4205334 | Integrated semiconductor device | Terumoto Nonaka, Shin Yamashita | 1980-05-27 |
| 4200879 | Integrated semiconductor device including static induction transistor | Terumoto Nonaka, Shin Yamashita | 1980-04-29 |