Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6999464 | Method of scalable non-blocking shared memory output-buffered switching of variable length data packets from pluralities of ports at full line rate, and apparatus therefor | Xiaolin Wang, Satish Soman | 2006-02-14 |
| 6684317 | Method of addressing sequential data packets from a plurality of input data line cards for shared memory storage and the like, and novel address generator therefor | Xiaolin Wang, Satish Soman, Benjamin Marshall | 2004-01-27 |
| 6272567 | System for interposing a multi-port internally cached DRAM in a control path for temporarily storing multicast start of packet data until such can be passed | Rajib Ray, Zbigniew Opalka | 2001-08-07 |
| 6138219 | Method of and operating architectural enhancement for multi-port internally cached dynamic random access memory (AMPIC DRAM) systems, eliminating external control paths and random memory addressing, while providing zero bus contention for DRAM access | Satish Soman | 2000-10-24 |