Mark Birman — 19 Patents at Netlogic Microsystems

Mark Birman has been granted 19 US patents while listed as an inventor at Netlogic Microsystems. The first was granted in 1990 and the most recent in March 2025. Mark Birman ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Mark Birman in San Jose, CA, US.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12259827	Systems and methods for address scrambling	Bhaswar Mitra	2025-03-25
12101356	High performance architecture for converged security systems and appliances	Rajan Sharma, Laxminarasimha Rao Kesiraju	2024-09-24
9269411	Organizing data in a hybrid memory for search operations	Cristian Estan, Prashanth Narayanaswamy	2016-02-23
8812480	Targeted search system with de-obfuscating functionality	Greg Watson, Cristian Estan, Alexei Starovoitov	2014-08-19	$4,226,000
8631195	Content addressable memory having selectively interconnected shift register circuits	Sandeep Khanna, Maheshwaran Srinivasan	2014-01-14
8214305	Pattern matching system and method for data streams, including deep packet inspection	Andrew Rosman, Pankaj Gupta, Ashish Goel	2012-07-03
7924590	Compiling regular expressions for programmable content addressable memory devices	Alexei Starovoitov, Maheshwaran Srinivasan, Varadarajan Srinivasan, Sandeep Khanna, Sachin Joshi	2011-04-12	$7,642,000
7916510	Reformulating regular expressions into architecture-dependent bit groups	Alexei Starovoitov, Maheshwaran Srinivasan, Varadarajan Srinivasan, Sandeep Khanna, Sachin Joshi	2011-03-29	$7,918,000
7881125	Power reduction in a content addressable memory having programmable interconnect structure	Maheshwaran Srinivasan, Varadarajan Srinivasan, Sandeep Khanna, Sachin Joshi	2011-02-01	$12,817,000
7876590	Content addressable memory having selectively interconnected rows of counter circuits	Sachin Joshi, Maheshwaran Srinivasan, Sandeep Khanna, Varadarajan Srinivasan	2011-01-25	$21,787,000
7836246	Method and apparatus for overlaying flat and/or tree based data sets onto content addressable memory (CAM) device	Ajay Srikrishna, Srinivasan Venkatachary	2010-11-16	$8,746,000
7826242	Content addresable memory having selectively interconnected counter circuits	Sachin Joshi, Maheshwaran Srinivasan, Sandeep Khanna, Varadarajan Srinivasan	2010-11-02	$9,009,000
7821844	Content addresable memory having programmable interconnect structure	Maheshwaran Srinivasan, Varadarajan Srinivasan, Sandeep Khanna, Sachin Joshi	2010-10-26	$8,497,000
7787275	Content addressable memory having programmable combinational logic circuits	Srinivasan Venkatachary	2010-08-31	$13,215,000
7660140	Content addresable memory having selectively interconnected counter circuits	Sachin Joshi, Maheshwaran Srinivasan, Sandeep Khanna, Varadarajan Srinivasan	2010-02-09	$13,423,000
7643353	Content addressable memory having programmable interconnect structure	Maheshwaran Srinivasan, Varadarajan Srinivasan, Sandeep Khanna, Sachin Joshi	2010-01-05	$5,915,000
7461200	Method and apparatus for overlaying flat and tree based data sets onto content addressable memory (CAM) device	Ajay Srikrishna, Srinivasan Venkatachary	2008-12-02	$2,244,000
5021985	Variable latency method and apparatus for floating-point coprocessor	Larry Hu, Ting Chuk, John McLeod, Allen Samuels, George K. Chu	1991-06-04	$1,957,000
4901267	Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio	George K. Chu, Fred Ware, Selfia Halim	1990-02-13	$1,173,000

Mark Birman — 19 Patents

Issued Patents All Time

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