Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8081535 | Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module | Jayesh R. Bhakta | 2011-12-20 |
| 8081536 | Circuit for memory module | Jayesh R. Bhakta | 2011-12-20 |
| 8081537 | Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module | Jayesh R. Bhakta | 2011-12-20 |
| 8072837 | Circuit providing load isolation and memory domain translation for memory module | Jayesh R. Bhakta | 2011-12-06 |
| 7916574 | Circuit providing load isolation and memory domain translation for memory module | Jayesh R. Bhakta | 2011-03-29 |
| 7881150 | Circuit providing load isolation and memory domain translation for memory module | Jayesh R. Bhakta | 2011-02-01 |
| 7864627 | Memory module decoder | Jayesh R. Bhakta | 2011-01-04 |
| 7636274 | Memory module with a circuit providing load isolation and memory domain translation | Jayesh R. Bhakta | 2009-12-22 |
| 7619912 | Memory module decoder | Jayesh R. Bhakta | 2009-11-17 |
| 7532537 | Memory module with a circuit providing load isolation and memory domain translation | Jayesh R. Bhakta | 2009-05-12 |
| 7289386 | Memory module decoder | Jayesh R. Bhakta | 2007-10-30 |
| 7286436 | High-density memory module utilizing low-density memory components | Jayesh R. Bhakta, William M. Gervasi | 2007-10-23 |