Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8259785 | Adaptive equalizer with function of stopping adaptive equalization processing and receiver | — | 2012-09-04 |
| 8179956 | Adaptive equalizer and adaptive equalization method | — | 2012-05-15 |
| 8019297 | Radio receiver, audio system, and method of manufacturing radio receiver | — | 2011-09-13 |
| 7602875 | Sampling rate conversion method and apparatus | Eiji Sudo | 2009-10-13 |
| 6950465 | Video coding by adaptively controlling the interval between successive predictive-coded frames according to magnitude of motion | Yutaka Yokoyama | 2005-09-27 |
| 6459733 | Apparatus and method for encoding video images including fade transition | Yutaka Yokoyama | 2002-10-01 |
| 6366616 | Motion vector estimating apparatus with high speed and method of estimating motion vector | Masayuki Mizuno | 2002-04-02 |
| 6249550 | Motion vector estimating apparatus with high speed and method of estimating motion vector | Masayuki Mizuno | 2001-06-19 |
| 5903674 | Picture coding apparatus | — | 1999-05-11 |
| 5589885 | Moving picture coding and decoding circuit | — | 1996-12-31 |
| 5579498 | Pipelined data processing system capable of stalling and resuming a pipeline operation without using an interrupt processing | — | 1996-11-26 |
| 5555511 | Data processing system for picture coding processing | — | 1996-09-10 |
| 5553257 | Address generating circuit of a two-dimensional coding table | Hideo Ishida | 1996-09-03 |
| 5398027 | Decoding circuit for variable length code | — | 1995-03-14 |
| 5375238 | Nesting management mechanism for use in loop control system | — | 1994-12-20 |
| 5347636 | Data processor which efficiently accesses main memory and input/output devices | Yoshiyuki Miki | 1994-09-13 |
| 5239660 | Vector processor which can be formed by an integrated circuit of a small size | — | 1993-08-24 |
| 5226129 | Program counter and indirect address calculation system which concurrently performs updating of a program counter and generation of an effective address | Yoshikuni Sato | 1993-07-06 |
| 5043878 | System with real-time checking of privilege levels and the system's state to allow access to internal resources of the system | — | 1991-08-27 |
| 4924376 | System for dynamically adjusting the accumulation of instructions in an instruction code prefetched pipelined computer | — | 1990-05-08 |
| 4833642 | Cache controller giving versatility to cache memory structure | — | 1989-05-23 |