ST

Shigeyoshi Tawada

NE Nec: 4 patents #3,388 of 14,502Top 25%
Overall (All Time): #1,272,907 of 4,157,543Top 35%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6405350 System and method for improving crosstalk errors via the insertion of delay gates 2002-06-11
6145116 Layout design apparatus 2000-11-07
6090150 Method of designing clock wiring and apparatus for implementing the same 2000-07-18
5404312 Automatic designing system capable of designing a logic circuit as desired 1995-04-04