Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7298658 | Semiconductor memory device using row redundancy and I/O redundancy scheme based on a preset order and a defect order | Kazuhito Anazawa | 2007-11-20 |
| 5436865 | Output circuit for semiconductor memory device realizing extended data output upon inactivation of CAS signal | — | 1995-07-25 |
| 5255243 | Random access memory device having transfer gate unit for blocking flash write data buffer unit from parasitic capacitance coupled with bit line pairs of memory cells | — | 1993-10-19 |