Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7381638 | Fabrication technique using sputter etch and vacuum transfer | — | 2008-06-03 |
| 6927160 | Fabrication of copper-containing region such as electrical interconnect | — | 2005-08-09 |
| 6602755 | Method for manufacturing a compact bipolar transistor structure | — | 2003-08-05 |
| 6501180 | Structure and method for controlling copper diffusion and for utilizing low K materials for copper interconnects in integrated circuit structures | — | 2002-12-31 |
| 6495904 | Compact bipolar transistor structure | — | 2002-12-17 |
| 6413872 | Method op optimizing vias between conductive layers in an integrated circuit structure | — | 2002-07-02 |
| 6313000 | Process for formation of vertically isolated bipolar transistor device | — | 2001-11-06 |
| 6277726 | Method for decreasing contact resistance of an electrode positioned inside a misaligned via for multilevel interconnects | Michael E. Thomas | 2001-08-21 |
| 6200900 | Method for formation of an air gap in an integrated circuit architecture | — | 2001-03-13 |
| 6143641 | Structure and method for controlling copper diffusion and for utilizing low K materials for copper interconnects in integrated circuit structures | — | 2000-11-07 |
| 6140238 | Self-aligned copper interconnect structure and method of manufacturing same | — | 2000-10-31 |
| 6103629 | Self-aligned interconnect using high selectivity metal pillars and a via exclusion mask | Michael E. Thomas | 2000-08-15 |
| 5904569 | Method for forming self-aligned vias in multi-metal integrated circuits | — | 1999-05-18 |