SC

Shao-Pin Chen

NS National Semiconductor: 3 patents #635 of 2,238Top 30%
📍 San Jose, CA: #14,517 of 32,062 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,653,907 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
5341040 High performance output buffer with reduced ground bounce Tim Garverick, Rafael C. Camarota 1994-08-23
5319255 Power up detect circuit for configurable logic array Tim Garverick, Rafael C. Camarota 1994-06-07
5298805 Versatile and efficient cell-to-local bus interface in a configurable logic array Tim Garverick, Jim Sutherland, Sanjay Popli, Venkata Alturi, Arthur E. Smith +7 more 1994-03-29