MC

Ming-Bing Chang

NS National Semiconductor: 7 patents #267 of 2,238Top 15%
Motorola: 2 patents #4,475 of 12,470Top 40%
TSMC: 2 patents #6,667 of 12,232Top 55%
UM United Microelectronics: 2 patents #1,942 of 4,560Top 45%
WE Windbond Electronics: 2 patents #9 of 136Top 7%
Overall (All Time): #225,930 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6959279 Text-to-speech conversion system on an integrated circuit Geoffrey B. Jackson, Aditya Raina, Bo-Hung Wu, Chuan-Shin Rick Lin, Bor-Wen Yang +4 more 2005-10-25
6865186 Multiple message multilevel analog signal recording and playback system having memory array configurable for analog and digital storage and serial communication Geoffrey B. Jackson, Saleel V. Awsare, Peter Holzmann, Oliver C. Kao, Hung-Chuan Pai +2 more 2005-03-08
6716700 Method of forming memory arrays based on a triple-polysilicon source-side injection non-volatile memory cell Chun-Mai Liu, Albert Kordesch 2004-04-06
6563733 Memory array architectures based on a triple-polysilicon source-side injection non-volatile memory cell Chun-Mai Liu, Albert Kordesch 2003-05-13
6261907 Method of forming a flash EEPROM device by employing polysilicon sidewall spacer as an erase gate 2001-07-17
6125060 Flash EEPROM device employing polysilicon sidewall spacer as an erase gate 2000-09-26
6101131 Flash EEPROM device employing polysilicon sidewall spacer as an erase gate 2000-08-08
6043530 Flash EEPROM device employing polysilicon sidewall spacer as an erase gate 2000-03-28
5991204 Flash eeprom device employing polysilicon sidewall spacer as an erase gate 1999-11-23
5841700 Source-coupling, split gate, virtual ground flash EEPROM array 1998-11-24
5705439 Method to make an asymmetrical LDD structure for deep sub-micron MOSFETS 1998-01-06
5644532 Method for programming a cell in a source-coupling, split-gate, virtual ground flash EEPROM array 1997-07-01
5612240 Method for making electrical connections to self-aligned contacts that extends beyond the photo-lithographic resolution limit 1997-03-18
5506160 Method of fabricating a self-aligned trench isolation scheme for select transistors in an alternate metal virtual ground (AMG) EPROM array 1996-04-09
5480821 Method of fabricating source-coupling, split-gate, virtual ground flash EEPROM array 1996-01-02
5412238 Source-coupling, split-gate, virtual ground flash EEPROM array 1995-05-02
5379254 Asymmetrical alternate metal virtual ground EPROM array 1995-01-03
5313419 Self-aligned trench isolation scheme for select transistors in an alternate metal virtual ground (AMG) EPROM array 1994-05-17
5273923 Process for fabricating an EEPROM cell having a tunnel opening which overlaps field isolation regions Ko-Min Chang, Clinton C. K. Kuo 1993-12-28
5258949 Nonvolatile memory with enhanced carrier generation and method for programming the same Ko-Min Chang 1993-11-02