Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6240004 | Low-voltage content addressable memory cell with a fast tag-compare capability using partially-depleted SOI CMOS dynamic-threshold techniques | Sheng Liu | 2001-05-29 |
| 6118689 | Two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability | Bo Wang | 2000-09-12 |
| 6061268 | 0.7V two-port 6T SRAM memory cell structure with single-bit-line simultaneous read-and-write access (SBLSRWA) capability using partially-depleted SOI CMOS dynamic-threshold technique | Sheng Liu | 2000-05-09 |
| 5973514 | 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined system operation | Jea-Hong Lou | 1999-10-26 |
| 5898333 | 1.5 bootstrapped pass-transistor-based Manchester-carry-chain circuit suitable for low-voltage CMOS VLSI | Jea-Hong Lou | 1999-04-27 |
| 5729165 | 1.5v full-swing bootstrapped CMOS large capacitive-load driver circuit suitable for low-voltage deep-submicron CMOS VLSI | Jea-Hong Lou | 1998-03-17 |